发明名称 MANUFACTURE OF MULTILAYER INTERCONNECTION STRUCTURE
摘要 PURPOSE:To facilitate reduction of continuity resistance even if the diameter of a through-hole is very fine by a method wherein sputtering etching is carried out while a mask for dry etching being left to remove contaminants in the through-hole and wiring material for 2nd layer wiring is applied by sputtering when the mask is completely removed. CONSTITUTION:1st layer Al wiring 3 is formed on a semiconductor substrate 1. A polyimide system resin film is formed on it as a layer insulating film 4. Then the polyimide system resin film is etched by dry etching with a mask 5 for dry etching to form a through-hole 8. After that, sputtering cleaning is carried out with Ar gas in a sputtering apparatus while the mask 5 being left as it is. With this cleaning sputtering, organic contaminants which are produced from the polyimide system resin in the through-hole S are removed and, at the same time, the mask 5 is also etched and removed. After the etching is finished, an Al film is formed over the whole surface by sputtering without exposing the surface of a lower electrode in the cleaned through-hole 8 to the atmosphere and, finally, after cleaning, 2nd layer Al wiring 9 which is linked with the 1st layer Al wiring 3 is formed.
申请公布号 JPS62249451(A) 申请公布日期 1987.10.30
申请号 JP19860092009 申请日期 1986.04.23
申请人 HITACHI LTD 发明人 FUKUSHIMA TAKEKI
分类号 H01L21/768;H01L21/31;H01L23/522 主分类号 H01L21/768
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