| 摘要 |
PURPOSE:To obtain an integrated circuit which does not require many test vectors at the time of a test, by bringing a random data to an internal generation by a flip-flop circuit having a random data generation mode. CONSTITUTION:A scan clock SCK is supplied to a clock input terminal 3, it is set to a scan mode, and a test data is inputted to a terminal 5, and transferred to flip-flops (FF) F1-Fn. When a random data generating clock GCK is supplied to a terminal 4, it becomes a random data generation mode. After the GCK is supplied by a necessary number of times, the terminal is set to a scan mode, and the data of the FF is led out of an output terminal. In accordance with whether its data has coincided with an expected value or not, whether an LSI is good or not is decided.
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