发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce a memory cell area by constituting two bits in one memory cell and by directly connecting the first and the second channel formation regions in series without interposing a semiconductor region and the like. CONSTITUTION:The memory cells M1-M4 of a mask ROM memory are provided at the intersections of a data line DL, a source line SL and each independently selected word lines W1, W2 respectively. The memory cells M1-M4 connect in series two n-channel MISFET Q which have each a separately connected gate electrode. In other words, the memory cells M1-M4 connect in series two channel formation regions which are each controlled by a separate gate electrode. Each channel formation region is set with one threshold voltage (Vth) of three threshold voltages and the information of the memory cell is written. That is, a two bit information is written since each memory cell M has two channel formation regions.
申请公布号 JPS62263672(A) 申请公布日期 1987.11.16
申请号 JP19860106647 申请日期 1986.05.12
申请人 HITACHI VLSI ENG CORP;HITACHI LTD 发明人 SAKAI KIKUO
分类号 H01L27/112;G11C17/00;H01L21/8246;H01L27/10;H01L29/78 主分类号 H01L27/112
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