发明名称 BRIDGE SYSTEM TRANSMISSION LINE REFLECTION TYPE VARIABLE DELAY CIRCUIT
摘要 <p>PURPOSE:To retard a high speed signal variably accurately by providing two grounding means or over to reflect an inputted signal onto a transmission line having a uniform characteristic impedance and detecting a retarded reflection wave in response to the grounding position on the transmission line. CONSTITUTION:A pulse 100a of an input signal 100 is supplied to a monostable multivibrator 1 and the result is outputted as single pulses 102a, 112a. When a decoder 12 selects a drive circuit 11c by a delay control signal 107, the single pulse 112a propagated on the transmission line 8 is inverted at a position of a diode bridge and a reflection pulse 112b returned to the bridge 3 is a reflection pulse 112b. The reflected pulse 112b is an unbalanced input to a bridge 5 and an input signal 103 of a comparator 5 appears as a reflected pulse 103b. The reflected pulse 103b is compared with a comparison voltage 104 from a D/A converter 4 by the comparator 5 and a positive pulse 105a is obtained as an output signal 105.</p>
申请公布号 JPH01320815(A) 申请公布日期 1989.12.26
申请号 JP19880152297 申请日期 1988.06.22
申请人 HITACHI LTD 发明人 SUGA TAKU;HAYASHI YOSHIHIKO
分类号 H01P9/00;H03H11/26;H03K5/13 主分类号 H01P9/00
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