Method of manufacturing a static induction transistor.

摘要

In fabricating a junction field effect transistor, specifically a static induction transistor an epitaxial layer (11) of high resistivity N-type silicon is grown on a substrate (10) of low resistivity silicon. The surface of the epitaxial layer is marked in a pattern to expose a plurality of elongated surface areas (13). The wafer is subjected to reactive ion etchings in SiCl4 and Cl2 and subsequently in Cl2 to form parallel grooves (15) with rounded intersection between the side walls (17) and bottoms (18) of the grooves (15). Ridges (16) of silicon are interposed between grooves (15). A layer of silicon oxide (21) is grown on all the silicon surfaces. The grooves (15) are filled with deposited silicon oxide (23) and silicon oxide is removed to form a planar surface with the upper surfaces of the ridges (16). P-type conductivity imparting material is ion implanted into alternate (gate) ridges (16A) and diffused to form gate regions (30) which extend laterally beneath the silicon dioxide (23 and 21) in the adjacent grooves (15), N-type conductivity imparting material is ion implanted in the top (33) of the intervening (source) ridges (16B). Metal contacts (35, 34, 32) are applied to the gate ridges (16A), source ridges (16B), and the bottom of the substrate.