Test system for multiple memory integrated circuit has device for sequential selection of test circuits and hence reduction in overall testing time

摘要

When test system is operating in write mode and data is being written to the memory devices the sample selection circuit selects all the memory devices so that groups of tested memory devices are sequentially selected and data is read from them. Test system has a pattern generator, a sample selection circuit and a report register circuit that captures signals from tested memory device is working correctly or not.