发明名称 Over-voltage protection of integrated circuit I/O pins
摘要 Circuits, methods, and apparatus for protecting devices in an output stage from over-voltage conditions caused by high supply and input voltages. Embodiments provide over-voltage protection that operates over a range of voltage levels, and that can be optimized for performance at different voltage levels. An exemplary embodiment of the present invention uses stacked devices to protect n and p-channel output devices from excess supply and input voltages. These stacked devices are biased by voltages received at their gates. These gate voltages vary as a function of supply voltage to maintain performance. Other embodiments of the present invention provide a body bias switch that generates a bias for the bulk of p-channel output devices. This bias tracks the higher of a supply or input voltage, such that parasitic drain-to-bulk diodes do not conduct. A switch may be provided that shorts the bulk connection to VCC under appropriate conditions.
申请公布号 US6970024(B1) 申请公布日期 2005.11.29
申请号 US20040786370 申请日期 2004.02.24
申请人 ALTERA CORPORATION 发明人 REESE DIRK;CHANG TZUNG-CHIN;SUNG CHIAKANG;NGUYEN KHAI;RANGAN GOPINATH;WANG XIAOBAO
分类号 H03K3/01;H03K3/356;H03K19/003;(IPC1-7):H03K3/01 主分类号 H03K3/01
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