发明名称 Continuous digital background calibration in pipelined ADC architecture
摘要 Disclosed are new methods and systems for achieving calibration in a pipelined ADC system. The methods and systems may be used to provide continuous digital background calibration in a pipelined ADC. Component mismatch error from each DAC in the pipeline is tabulated to provide an integral nonlinearity profile, which is subtracted from the ADC transfer characteristic.
申请公布号 US7035756(B2) 申请公布日期 2006.04.25
申请号 US20030738751 申请日期 2003.12.17
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 MALOBERTI FRANCO;KINYUA MARTIN KITHINJI
分类号 G06F19/00;H03M1/10;H03M1/14 主分类号 G06F19/00
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