发明名称 Verfahren zur Passivierung von Halbleiterbauelementen
摘要 1,127,629. Semi-conductor devices. CSFCOMPAGNIE GENERALE DE TELEGRAPHIE SANS FIL. 2 Dec., 1965 [3 Dec., 1964], No. 51308/65. Heading H1K. In a semi-conductor device such as a planar diode or transistor the surface at which the junction or junctions emerge is covered with insulant and a conducting layer on the insulated surface extends beyond the edge of this surface to contact an adjacent non-insulated surface. In this way the conducting layer is capacitatively coupled to one region of the device and directly connected to another so that, especially if the latter is the less heavily doped region, uncontrolled surface charge effects which would otherwise be caused by the presence of the insulant are avoided. In Fig. 2 (not shown), the device is a planar diode consisting of a P-type silicon wafer containing an N-type surface region and provided with a contact to this region. A layer of silicon dioxide covers the PN junction and surrounds the contact. Covering the oxide is a metallic layer, insulated from the contact but connected to the P-type body of the device by extending the metallic layer beyond the edge of the insulating layer to cover the peripheral face of the wafer. Fig. 3 (not shown), depicts an NPN planar transistor in which both the emitter and the base contacts extend through the oxide and are insulated from the surmounting metallic layer. Fig. 4 depicts a pair of interconnected transistors formed in a common P-type body. The oxide 28 protecting all the junctions is covered, as in the embodiments described above, with metal 34. The external base and emitter contacts 35 to 38 are insulated from this metal coating, and the connection 29 between the transistors is a thin metallic layer embedded in the oxide.
申请公布号 DE1489788(A1) 申请公布日期 1969.06.04
申请号 DE19651489788 申请日期 1965.12.02
申请人 CSF-COMPAGNIE GENERALE DE TELEGRAPHIE SANS FILS 发明人 GROSVALET,JEAN
分类号 H01L21/00;H01L23/29;H01L23/485 主分类号 H01L21/00
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