Buffer memory for time shared process control - control unit shifts data held in small capacity buffer of CCD shift register

摘要

A buffer memory located between a central processor and the main store facilitates processor (ZD) issues an address instruction (AD) to the control section (HM) of the buffer store (CA). If data is held in the buffer it is transmitted to the central processor (WO). If not a data block containing the required word is extracted (BL) from the main memory (HS). A control unit (CS) provides a means of tracking the processes under control. The next process to be controlled is indicated by a signal (PN) to generate a clock signal (T2) to shift the contents of the buffer memory. The buffer memory is based upon a shift register using (CCD) devices.