发明名称 RESET SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To perform initial reset even at the application of electric power and the instantaneous reduction of power voltage by providing said circuit with a circuit generating a reset signal after a prescribed time from the application of electric power and a circuit generating a reset signal in accordance with the instantaneous reduction of power voltage. CONSTITUTION:The 1st reset signal generating circuit consists of an integration circuit 1 and a Schmitt trigger circuit 8 included in the integration circuit 1 and generates an initial reset signal after a prescribed delay time from the rise of power voltage. The 2nd reset signal generating circuit 12 is a monostable multivibrator which operates in accordance with a result detected by an instantaneous power voltage reduction detecting circuit 11 and generates an initial reset signal at the instantaneous reduction of power voltage.
申请公布号 JPS57190421(A) 申请公布日期 1982.11.24
申请号 JP19810075166 申请日期 1981.05.19
申请人 TOKYO SHIBAURA DENKI KK 发明人 NAMIMOTO KEIJI
分类号 H03K17/22 主分类号 H03K17/22
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