发明名称 DEBUG DEVICE
摘要 PURPOSE:To reference the content of a user side memory by supplying data read from the use memory to a 2nd microprocessor when an address signal corresponding to a prescribed address set in a memory reference control means is supplied from a 1st microprocessor during the execution of a user program. CONSTITUTION:When an address signal outputted from a slave microcomputer SMCU is coincident with an address corresponding to a control data CD having a level '1b set in a control memory CM in advance during the execution of the use program, the data read from a user memory UM or a substitution memory SM to a slave data bus SDB is latched by a latch circuit LAT. Thus, a master microcomputer MMCU bring a read control signal RC to a read level in a desired timing. Thus, the data of a prescribed address to be referenced in the substitution memory SM or the user memory UM is referenced without stopping the execution of the user program.
申请公布号 JPS63106841(A) 申请公布日期 1988.05.11
申请号 JP19860251705 申请日期 1986.10.24
申请人 HITACHI LTD;HITACHI MICRO COMPUT ENG LTD 发明人 NISHIMURA TETSURO;YONEYAMA KOJI
分类号 G06F11/28;G06F11/22 主分类号 G06F11/28
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