发明名称 CLOCK SUPPLIER
摘要 PURPOSE:To attain highly accurate phase adjustment without requiring a phase shift clock generating section by detecting a phase difference between an output clock of each clock receiver and an output clock of other clock receiver and selecting a passive delay element being a required component among passive delay elements so as to offset the phase difference. CONSTITUTION:A clock receiver 13 (14) is provided with a phase comparison section 18 detecting a phase difference between its output clock and an output clock of other clock receiver, a passive delay element 17 receiving a clock from a clock generator 11 via a reception section 11, and a selector 19 selecting a required passive delay element among passive delay elements 17 to cancel the phase difference. Then the selector 19 selects a required passive delay element among the passive delay elements 17 based on the phase difference to offset the phase difference. Thus, the phase is adjusted with high accuracy without need of a phase shift clock generating section.
申请公布号 JPH02306719(A) 申请公布日期 1990.12.20
申请号 JP19890127281 申请日期 1989.05.20
申请人 FUJITSU LTD 发明人 KASAHARA SHUNICHI;TSURUMAKI SHINZO;TAKADA KUNIO;OBA MASASHI;SUKEGAWA SEI
分类号 H03K5/00;G06F1/10;H03L7/00 主分类号 H03K5/00
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