发明名称 CLOCK GENERATOR
摘要 If, in a clock generator according to the present invention, the first clock is switched to the second clock with a lower frequency, the frequency count circuit counts the frequency of the second clock with using the first clock as reference. The clock switching control means judges whether the frequency of the second clock is stable or not based on the count result from said frequency count circuit and, if it is stable, switches the switching means for clock switching to the second clock.
申请公布号 CA2091381(A1) 申请公布日期 1993.09.12
申请号 CA19932091381 申请日期 1993.03.10
申请人 TOMIYORI, YUTAKA 发明人 TOMIYORI, YUTAKA
分类号 G06F1/06;G06F1/08;H03K17/00;(IPC1-7):H04L7/00;H04L1/20 主分类号 G06F1/06
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