发明名称 NEST
摘要 <p>PROBLEM TO BE SOLVED: To attain the normal transmission of signals despite the use of an inexpensive output buffer having small drive capability by preparing plural bus signal lines on a back board and decreasing the number of cards which are connected to the bus signal lines. SOLUTION: A slot includes a slave-only slot 21 where only a slave card is inserted and a master enable slot 22 where the slave card and a master card can be inserted. The slot addresses are allocated to both slots 21 and 22. A nest is internally divided into two groups, i.e., a 0-system of even numbered slot addresses and a 1-system of odd numbered slot addresses, and the bus signal lines 23 and 24 are prepared for both 0-system and 1-system respectively. Then the slave card is connected to only one of both lines 23 and 24, and the master card can be connected to both lines 23 and 24 and can communicate with them. In such a constitution, the number of cards which are connected to the lines 23 and 24 can be decreased.</p>
申请公布号 JPH11249760(A) 申请公布日期 1999.09.17
申请号 JP19980047311 申请日期 1998.02.27
申请人 YOKOGAWA ELECTRIC CORP 发明人 YOKOI TOYOAKI;MATSUKAWA HIDEO;HAYASHI SHUNSUKE
分类号 G06F1/18;G06F3/00;(IPC1-7):G06F1/18 主分类号 G06F1/18
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