| 摘要 |
A method of fabricating a split gate flash memory. A substrate is provided for implantation with first ions to form a source region in the substrate. Second ions are implanted into the substrate to form a drain region in the substrate, wherein the source region is connected to the drain region. A part of the substrate is defined to form a number of trenches, wherein the trenches are located between the source region and the drain region. A tunneling oxide layer is formed along the profile of the trenches and on the surface of the substrate. The trenches are subsequently filled with a first polysilicon layer, wherein the depth of the first polysilicon layer is between that of the source region and that of the drain region in the substrate. An inter-dielectric layer is formed over the surface on the substrate and the first polysilicon layer, and a second polysilicon layer is formed on the substrate. The second polysilicon layer, the inter-dielectric layer, and the first poysilicon layer are defined to complete the fabricating of the flash memory device.
|
