| 摘要 |
PROBLEM TO BE SOLVED: To provide an output buffer circuit capable of realizing a low slew rate without increasing an area and without deteriorating an output driving performance. SOLUTION: A load CL is driven by one output transistor (P1 or N1) when transition of an input voltage starts, and is driven by two transistors (P1 and P2 or N1 and N2) by adding an additional transistor in the middle and after the transition. A capacitive element (C1 or C2) dulls a gate voltage waveform of the output transistor (P1 or N1) for driving the load CL at the time of starting transition. In this way, the low slew rate is realized. COPYRIGHT: (C)2005,JPO&NCIPI
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