发明名称 PACKET IDENTIFYING CIRCUIT
摘要 <p>PURPOSE:To provide the packet identifying circuit which can identify packets at high speed with simple configuration in a facsimile broadcasting receiver. CONSTITUTION:A comparator 4 compares an inputted mode control part with a bit pattern in the case of free broadcasting, and a comparator 5 compares the inputted mode control part with a bit pattern in the case of pay broadcasting. Adders 6 and 7 add the outputs of the comparators 4 and 5 and respectively output the numbers of non-coincident bits. Discriminators 8 and 9 compare the number of non-coincident bits with '3' as the number of error correcting and correctable bits and output discriminated values. When the discriminated value outputted from the discriminator 8 is '1', it is free broadcasting and when the discriminated value outputted from the discriminator 9 is '1', it is pay broadcasting.</p>
申请公布号 JPH05284124(A) 申请公布日期 1993.10.29
申请号 JP19920105714 申请日期 1992.03.31
申请人 发明人
分类号 H04H20/00;H04H40/18;H04H60/37;H04L1/00;H04L12/56;H04N1/00;H04N7/025;H04N7/03;H04N7/035;H04N7/08;(IPC1-7):H04H1/00 主分类号 H04H20/00
代理机构 代理人
主权项
地址