| 摘要 |
PURPOSE:To obtain a data train where the multi-frame synchronization is secured with no addition of a complicated circuit by using a frame synchronizing pattern as the address of an ROM and then the contents stored in the ROM as the frame phase information on the frame synchronizing pattern against a multi-frame synchronizing pattern. CONSTITUTION:The input data trains are inputted successively to an input data memory. Then an ROM 2 which uses the outputs of output taps 1-6 of the memory 1 as addressed outputs the data corresponding to the addresses shown in the figure. When the frame synchronization is kept under a hunting state, the output of a latch 5 is compared with that of the ROM 2. then a series of control are carried out for the back protection, set-up of synchronization and front protection according to the coincidence or discordance of said comparison. While the output which is selected by a selector 4 with the output of the latch 5 latched when the frame synchronization is set up is turned into a multi- frame data train that uses the output enable signal CE of the ROM 2 as a multi-frame signal. |
