发明名称 HIGH DENSITY ELECTRONIC PACKAGE COMPRISING STACKED SUB-MODULES
摘要 <p>A high density electronic package (16) in which a stack of layer-like sub-modules have their edges (34) secured to a stack-carrying substrate (18), the latter being in a plane perpendicular to the planes in which the sub-modules extend. Each sub-module has a cavity (72), inside which one or more IC chips are located. Each cavity-providing sub-module may be formed either by securing a rectangular frame (32) to a chip-carrying substrate, or by etching a cavity in a single piece of material. In the latter case, the chips are mounted on the flat surface of one sub-module, and located inside the cavity of the next sub-module.</p>
申请公布号 WO1988005251(A1) 申请公布日期 1988.07.14
申请号 US1988000060 申请日期 1988.01.04
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址