| 摘要 |
The semiconductor memory device for increasing the capacitance comprises a MOSFET formed on silicon substrate (1) and double stacked capacitor connected with drain region (6') of MOSFET. The double stacked capacitor is formed by the following steps; forming a first charge storage electrode (8), dielectric layer (9), cell plate electrode (10), dielectric layer (11), and conducting material (12') for a second charge storage electrode in sequence at drain region (6'); forming a contact hole at fixed region from the second charge storage electrode to the first (8); forming a dielectric layer (14) on upper side of the second charge storage electrode and contact hole, followed by forming a conducting material (15).
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