| 摘要 |
A binary decision apparatus comprising a control unit which generates the binary decision apparatus' control signals from an operation code contained in the first byte of an instruction, a program counter which provides addressing for an external program memory, and a memory buffer register for holding digital instruction data provided by the external program memory. External control signals provided to the binary decision apparatus include a single phase system clock, a system reset signal and a wait signal that can be used to single-step the binary decision apparatus. Program instructions are provided from the external program memory to the binary decision apparatus via an eight-bit data bus, while an internal twelve-bit data bus routes digital information between the registers and counters of the binary decision apparatus. The binary decision apparatus of the present invention also includes an input register for receiving and then latching into the register external binary signals, an output register which is a bit or word address register that provides the digital logic output signals for the binary decision apparatus, a flag register in which status bits are stored and counters and registers for performing the counting and other functions/operations of the binary decision apparatus.
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