发明名称 Counter circuit capable of generating adjustable precise desired frequency
摘要 A programmable counter composed of D-type flipflops receives a clock pulse having a constant frequency and is configured to generate a count pulse when a count value reaches a programmed number. A ring counter composed of D-type flipflops receives the count pulse from the programmable counter. A coincidence detection and control circuit detects a predetermined count value of the ring counter, and modifies the programmed maximum count number of the programmable counter, so that the maximum count value of the programmable counter can be selected from either an ordinary maximum count number or the predetermined maximum count number.
申请公布号 US5373542(A) 申请公布日期 1994.12.13
申请号 US19920982624 申请日期 1992.11.27
申请人 NEC CORPORATION 发明人 SUNOUCHI, SHIGEMI
分类号 H03K23/00;G04G3/02;H03K23/54;H03K23/66;(IPC1-7):G04F10/04 主分类号 H03K23/00
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