| 摘要 |
A circuit arrangement includes an active current divider connected in series with a capacitor (C) and having two resistors (R2,R3) as well as an impedance converter (1) e.g. an op.amp. (OpV), with a high resistance input resistor and a low resistance output resistor. An input terminal (E2) is connected to a first terminal of capacitor (C), and output terminal (A) is connected to a first terminal of the first resistor (R2) and to the first terminal of resistor (R3). The first resistor (R2) is connected in series with the capacitor (C) and the second resistor (R3) is connected at the output of the impedance converter (1).
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