| 摘要 |
<p>A tristate I/O buffer (101) suitable for cooperation with modules (31) which operate at a higher supply voltage than the supply voltage of the buffer (101). The output (4) of the buffer (101) is provided with an overvoltage protection circuit (110) which prevents current leakage from the output (4) to the supply voltage line (VDD) of the buffer (101). The overvoltage protection circuit (110) comprises a PMOS blocking transistor (120), a first PMOS control transistor (130) and a second NMOS control transistor (140). The two control transistors (130, 140) are controlled by a control signal which is derived solely from the enable signal (E).</p> |
