| 摘要 |
PURPOSE:To automatically enable the test of a CPUIF circuit on the reading/ writing test of a register in the CPU interface test circuit. CONSTITUTION:This circuit is constituted of a frequency divider 1 generating a first signal, a second signal and a third signal which are obtained by dividing a main clock into prescribed frequencies, a phase adjuster 2 which arranges the three signals generated in the frequency divider 1 to the same phase, and uses the signal for the chip selection of the reading/writing of the register concerned, the second signal for the setting of the reading/writing of the register concerned and the third signal for the address of the register concerned, a first counter 3 executing the n-ary counting of the third signal and second counter 4 executing the m-any counting of the second signal and decoding a counting result concerned to form data of the register. |
