REDUCED PARASITIC CAPACITANCE WITH SLOTTED CONTACT

摘要

A FET device fabricated by providing a first conductor on a substrate, the first conductor having a first top surface with a first height above the substrate. A second conductor is provided adjacent the first conductor, the second conductor having a second top surface with a second height above the substrate. A portion of the second conductor is removed to provide a slot, wherein the slot is defined by opposing interior sidewalls and a bottom portion, such that the bottom portion of the slot is below the first height of the first conductor. An insulating material is deposited in the slot, the insulating material having a third top surface with a third height above the substrate, the third height being below the second height of the second conductor to provide space within the slot for a third conductor. The space within the slot is then filled with the third conductor.

主权项

1. A semiconductor device, the device comprising:
a first conductor formed on a substrate, having a first top surface with a first height that is positioned above the substrate; a second conductor formed on the substrate adjacent the first conductor, having a second top surface with a second height that is positioned above the substrate; and wherein the second conductor includes an insulating portion therein having a third top surface with a third height that is positioned above the substrate.