发明名称 VERTICAL HIGH-VOLTAGE MOS TRANSISTOR AND METHOD OF FORMING THE MOS TRANSISTOR WITH IMPROVED ON-STATE RESISTANCE
摘要 A vertical, high-voltage MOS transistor, which has a source region, a body contact region, and a number of trenches structures with field plates, and a method of forming the MOS transistor increase the on-state resistance of the MOS transistor by reducing the trench pitch. Trench pitch can be reduced with metal contacts that simultaneously touch the source regions, the body contact regions, and the field plates. Trench pitch can also be reduced with a gate that increases the size of the LDD region.
申请公布号 US2016163804(A1) 申请公布日期 2016.06.09
申请号 US201414563706 申请日期 2014.12.08
申请人 Texas Instruments Incorporated 发明人 Kocon Christopher Boguslaw;Molloy Simon John;Neilson John Manning Savidge;Kawahara Hideaki
分类号 H01L29/40;H01L29/06;H01L29/417;H01L29/66;H01L29/78;H01L29/08 主分类号 H01L29/40
代理机构 代理人
主权项 1. A MOS transistor comprising: a semiconductor substrate having a top surface and a bottom surface; a drain drift region positioned above the bottom surface of the semiconductor substrate; a body region positioned above the drain drift region; a lightly doped drain (LDD) region positioned above the drain drift region; and a trench structure extending from the top surface of the semiconductor substrate to the drain drift region, the trench structure having a first side wall and a second side wall facing away from the first side wall, the first side wall abutting the body region, and the second side wall abutting the LDD region.
地址 Dallas TX US