MEMORY CONTROLLER, METHOD OF CONTROLLING THE SAME, AND SEMICONDUCTOR MEMORY DEVICE HAVING BOTH

摘要

A memory controller, a method of controlling the same, and a semiconductor memory device having the same are provided. The memory controller includes a cache memory provided between an external host and a nonvolatile memory; and a memory manager suitable for storing a plurality of determination values respectively corresponding to a plurality of addresses of the cache memory, wherein the memory manager selects one of the plurality of addresses as a load address corresponding to data to be loaded in the cache memory based on the plurality of the determination values, and initialize the determination value corresponding to the load address based on a type of a command from the host.

主权项

1. A memory controller comprising:
a cache memory provided between an external host and nonvolatile memory; and a memory manager suitable for storing a plurality of determination values respectively corresponding to a plurality of addresses of the cache memory, wherein the memory manager selects one of the plurality of addresses as a load address corresponding to data to be loaded in the cache memory based on the plurality of the determination values, and initializes the determination value corresponding to the load address based on a type of a command from the host.