| 摘要 |
<p>When the display is to be erased from active matrix-type liquid crystal display elements which have a source bus drive circuit (16) and a gate bus drive circuit (17), pixel signals for turning the pixels off are supplied in an amount of one line to the source bus drive circuit and, at the same time, a clear signal (CL) is given to a gate bus drive circuit (17) to apply a voltage simultaneously to all gate buses (151 to 15m) to turn on the transistors (13) in all of the pixels. Provision is made of a power source holding circuit (22) for holding the power of the power source (V1) supplied to the gate bus drive circuit (17) for a predetermined period of time even after the power source is turned off, and a voltage drop detect circuit (24) for detecting the turn-off of the power source. A clear signal (CL) is produced in response to the detect signal and is sent to the gate bus drive circuit (17). In response to the clear signal, the gate bus drive circuit supplies a voltage for turning on the transistors (13) of all pixels simultaneously to all of the gate buses to erase the display in a short period of time after the power source is turned off.</p> |
