发明名称 Method for data bus snooping in a data processing system by selective concurrent read and invalidate cache operation
摘要 A bus snoop control method for maintaining coherency between a write-back cache and main memory during memory accesses by an alternate bus master. The method and apparatus incorporates an option to source 'dirty' or altered data from the write-back cache to the alternate bus master during a memory read operation, and simultaneously invalidate 'dirty' or altered data from the write-back cache. The method minimizes the number of cache accesses required to maintain coherency between the cache and main memory during page-out/page-in sequences initiated by the alternate bus master, thereby improving system performance.
申请公布号 US5119485(A) 申请公布日期 1992.06.02
申请号 US19890351898 申请日期 1989.05.15
申请人 MOTOROLA, INC. 发明人 LEDBETTER, JR., WILLIAM B.;REININGER, RUSSELL A.
分类号 G06F12/08 主分类号 G06F12/08
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