| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of inputs to an adder for adding partial products in a multiplier. SOLUTION: A multiplier encoder 101 encodes an 8-bit multiplier in accordance with secondary Booth's algorithm. In parallel with the encoding, a complementer 102 bit-inverts the five lower bits of an 8-bit multiplicand and adds '1' to the bit-inverted multi-plicand to form a 2's compliment and finds out complement data and a carry. A multi-input adder 104 adds four partial products generated by 1st to 4th partial product generators 110 to 113 from the output of the encoder 101 and the multiplicand to find out a product. When the logic value of a partial product complementing bit in the uppermost part of the output from the encoder 101 is '1', a selector circuit 103 substitutes the five lower bits of 4th partial product data generated by the 4th partial product generator 113 for the complement data of the circuit 102 and the influence of the carry of the complementer 102 to three upper bits of the 4th partial product data is attained in the 1st and 2nd partial product generators 110, 111. |
