发明名称 HIGH-VOLTAGE GENERATION METHOD IN NONVOLATILE SEMICONDUCTOR MEMORY, CIRCUIT FOR OPTIMIZATION OF HIGH-VOLTAGE LEVEL AND METHOD THEREFOR
摘要 <p>PROBLEM TO BE SOLVED: To obtain a high-voltage generation mehtod in which the time required for an erase operation and a programming operation is optimized and whose reliability and performance are enhanced by a method wherein the starting level of a high voltage is optimized in the erase operation and the programming operation. SOLUTION: A trimming counter 202 and a trimming encoder 203 act as a loop number-of-times counting circuit, for output of a level control signal, in order to supply an erase voltage of a programming voltage so as to be increased from a starting level whenever in erase operation and a programming operation are repeated. The counter 202 receives a program loop pulse OSP for counting of the number of times of the programming operation. In addition, a trimming address register 201 is installed, and it receives an address which is applied via an address buffer 10. The register 201 comprises many fuse elements which can be blown, it outputs, to the loop number- of-times counting circuit, a trimming signal for change of the starting level so as to respond to the address in a test, it selects and blows the fuse elements on the basis of a test result, it fixes a triming signal, and it sets the optimum starting level of the erase time and the programming time.</p>
申请公布号 JPH09180481(A) 申请公布日期 1997.07.11
申请号 JP19960331266 申请日期 1996.12.11
申请人 SAMSUNG ELECTRON CO LTD 发明人 RI JIYOUSHIYUU;KIN CHINKI
分类号 G11C17/00;G11C16/06;G11C16/10;G11C16/30;G11C16/34;G11C29/50;G11C29/52;(IPC1-7):G11C16/06 主分类号 G11C17/00
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