Methods and apparatus for reducing spatial overlap between routing wires

摘要

An integrated circuit may have interconnect circuitry which may include a sequence of tiles. Each tile may include a predetermined routing of multiple wires on multiple tracks. Wires may change tracks within a tile through wire twisting or through via connections and wires in another metal layer. Wires that change tracks may reduce the overlap between pairs of adjacent wires, thereby reducing the coupling capacitance between the respective wires. Reducing the coupling capacitance may result in reduced crosstalk between the wires which may speed up the signal transition along those wires compared to the signal transition in conventional interconnect circuitry. At the same time, sub-optimal wire stitching in a routing tile that connects a wire that ends in the next routing tile to a wire that starts in the routing tile, whereby the two wires overlap each other may enable beneficial crosstalk, which may further improve signal transition time.

主权项

1. Interconnect circuitry, comprising:
a routing tile in a sequence of tiles, wherein the routing tile comprises:
a first wire in a first metal layer that has a first endpoint in a first track;a second wire in the first metal layer that has a second endpoint in a second track that is different than the first track;a third wire in the first metal layer that has a third endpoint in a third track that is different than the first and second tracks;a fourth wire in the first metal layer that runs along the first track; anda connection from the third wire to the fourth wire through at least two via connections and a track in a second metal layer.