发明名称 POWER AMPLIFYING CIRCUIT
摘要 PURPOSE:To reduce power loss, by selecting a signal having the maximum amplitude out of amplified output signals of a plurality of channels and constituting the selected signal as the power supply for a power amplifier of each channel after PWM amplification. CONSTITUTION:Signals given to input terminals 11 and 12 are amplified at voltage amplifying circuits 13 and 14 and power amplifying circuits 15 and 16 and outputted from output terminals 17 and 18. Ampliftude selection circuits 19 and 20 select the maximum amplitude of both polarities out of output signals of the amplifying circuits 15 and 16 and the outputs are applied to PWM amplifying circuits 23 and 24 via bias additional circuits 21 and 22. The PWM amplifying circuits 23 and 24 PWM-amplify the respective input signals and apply the outputs to the power amplifiers 15 and 16 positive and negative power supply voltages.
申请公布号 JPS57155811(A) 申请公布日期 1982.09.27
申请号 JP19810041523 申请日期 1981.03.20
申请人 SANYO DENKI KK 发明人 NISHIMURA MASARU
分类号 H03F1/02;H03F3/20;H03F3/217 主分类号 H03F1/02
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