发明名称 |
PHASE CONTROL SYSTEM |
摘要 |
PURPOSE:To decrease the number of sampling points and to reduce the computation processing time by sampling a signal at n-point (n is an integral number of 3<=n<m) among m-point f phase selecting points in one data period and obtaining the optimum sampling phase from a bit error number (rate) at the n-set of phase selection points. CONSTITUTION:A data is sampled at three phase selection points P1-P3 in the phase range of 0-360 deg. in one data period (1 bit) and bit) and bit error numbers E1-E3 are measured at each phase selection point. A quadratic equation (quadratic curve S) is approximated from the bit error numbers E1-E3 at the 3 phase selection points P1-P3 and a phase selection point P corresponding to the bit error number E minimizing the quadratic equation is obtained by calculation. Then the phase selection point P to be minimized is used as th optimum sampling phase. |
申请公布号 |
JPS62193431(A) |
申请公布日期 |
1987.08.25 |
申请号 |
JP19860035681 |
申请日期 |
1986.02.20 |
申请人 |
VICTOR CO OF JAPAN LTD |
发明人 |
EGURI SHIGEHARU;OMURA KAZUHIKO;KURODA SATORU |
分类号 |
H04N7/08;H03M5/12;H04L7/02;H04N5/073;H04N7/025;H04N7/03;H04N7/035;H04N7/081 |
主分类号 |
H04N7/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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