| 摘要 |
PROBLEM TO BE SOLVED: To provide a method of designing a semiconductor integrated circuit which is lessened in area occupied by wiring, fine and enhance in density. SOLUTION: Transistors arranged on a semicondutor substrate 1 are connected to a first metal wiring layer 5 with a first to a fifth plug, 6a to 6e, and the first metal wiring layer 5 and a second metal wiring layer 8 are connected together with a sixth to an eighth plug, 6f to 6h. In a case where the type (waveform) of a current so two-way, a current flows a plug to a wiring, and the wiring is long in length and narrow in width, the total aperture area (number) of connection holes is designed so as to be a small zone. By this setup, the layout of a semiconductor integrated circuit is designed taking an allowable current capacity into consideration without preparing a complicated table or executing a large amount of operations, whereby the semiconductor integrated circuit can be lessened in wiring area. |
