发明名称 CONDUCTOR TRACK ARRANGEMENT AND METHOD FOR PRODUCING A CONDUCTOR TRACK ARRANGEMENT
摘要 <p>An interconnect arrangement ( 100 ) has a first layer ( 101 ), a first layer surface ( 102 ), thereon at least two interconnects ( 104 ) having a second layer surface ( 105 ) essentially parallel to the first layer surface ( 102 ), thereon a respective second layer ( 106 ) for each interconnect ( 104 ), the second layers ( 106 ) of adjacent interconnects covering regions between the adjacent interconnects ( 104 ), and thereon a third layer ( 107 ), which completely closes off the regions between the adjacent interconnects ( 104 ) by means of coverage.</p>
申请公布号 KR100531338(B1) 申请公布日期 2005.11.29
申请号 KR20037011396 申请日期 2003.08.29
申请人 发明人
分类号 H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/768 主分类号 H01L21/768
代理机构 代理人
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