| 摘要 |
1,273,724. Computers. INTERNATIONAL BUSINESS MACHINES CORP. 8 Jan., 1970 [14 Jan., 1969], No. 1047/70. Heading G4A. An overload protection circuit for computing apparatus having a plurality of I/O devices time-sharing a channel comprises a control unit associated with each I/O device to generate a signal indicating that the device is operating or required to operate, and a test unit which weights each signal according to the channel capacity required by its respective I/O device, sums the weighted signals and, when the sum exceeds a predetermined value representing the capacity of the channel, generates an output signal which prevents an I/O device required to operate from being connected to the channel and causes the computing apparatus to remain at a programme instruction selecting the I/O device required to operate. When an I/O device is selected by the CPU and receives a START I/O or TEST I/O instruction indication, it sends a 1 signal to the CPU where such signals are applied to a summing amplifier via respective resistors providing the weighting. According as the sum voltage does or does not exceed a threshold, a signal sent to the I/O devices prevents or enables the selected I/O device being connected to the channel, which event occurs being signalled to the CPU. If connection is enabled, the 1 signal to the respective resistor is maintained until device operation ends. The overload protection feature could also be applied to interrupt load factors and cycle steal load factors. Also, to permit variation in relative times for processing with respect to I/O, the CPU could have a respective weighted resistor feeding the summing amplifier or the threshold could be selectable. A binary counter could alternatively be used for the summing. |
