Gesteuerte Wechselrichteranordnung

摘要

1,251,339. D.C. to A.C. static invertors. DANFOSS A.S. 29 Aug., 1968 [29 Aug., 1967], No. 40132/68. Heading H2F. In a firing pulse producing arrangement for a D.C./A.C. invertor, it is arranged that firing pulses for load thyristors are delayed with respect to firing pulses for commutating thyristors which are connected in series with commutating capacitors, to ensure that the capacitors are always charged in readiness for subsequently turning off their respective load thyristor. The invertor circuit illustrated in Fig. 3 (not shown) is the same as that described and abridged in respect of Specification 1,250,195. Briefly, it includes two load thyristors which are fired alternately to supply, via a centre tapped choke, a full wave square waveform to an output, and in parallel with each load thyristor there is a separate commutating circuit including a capacitor and thyristor in series, the latter thyristor being fired firstly to effect charging of the capacitor and secondly to effect discharge thereof to turn-off the load thyristor. Pulse circuit (Fig. 4).-An h.f. signal e, an l.f. signal T and a signal W derived from the invertor output are fed into the circuit and are added by a network R15, R13 and R32. Their sum is applied to a zero level or null detector comprising a differential amplifier Tr14, Tr15, the base of Tr15 being connected to zero potential. The detector is connected to an output amplifier Tr7, Tr8, at an output point 2 of which a square waveform signal b is produced, and at an output point 3 a square wave signal b1 in phase opposition thereto. The waveform b (see Fig. 2) is differentiated by C15 and the resulting signal i 1 is fed to an output terminal 1W via a pulse forming stage comprising Tr9 and a transformer T2. The waveform b1 is differentiated by C14 to produce pulse signal i 2 which is fed to output terminal 3W via Tr6 and a transformer Tl. The pulses at 1W and 3W are to fire the commutating or quenching thyristors. Signals b, b1 are also applied to the inputs of a differential amplifier Tr11, Tr12 and the two outputs thereof are differentiated by C16, C17 respectively and are transmitted as firing pulses Z 1 Z 2 for the load thyristors to terminals 2W, 4W, via Tr10 and transformer T3 and via Trl3 and transformer T4 respectively. A Zener diode EZ3 determines the minimum operating voltage, for Tr11 and Tr12. The striking pulses Z 1 Z 2 for the load rectifiers follow respectively the quenching rectifiers firing pulses i 1 i 2 after a short interval but with a slight overlap (Fig. 2). The desired delay is obtained solely due to the fact that the rise times of square wave voltages bb 1 across the null detector are lengthened by the differentiating elements C14, C15 for the load rectifiers firing pulses.