发明名称 DELAY EQUALIZER
摘要 PURPOSE:To attain the switching of a flat state and an equalizing state of a certain characteristic without interruption of signal and without change in electric length by changing over a sub-signal system to provide a characteristic change while a main signal system is kept connected. CONSTITUTION:A distibutor 2 divides an input signal into a main signal and a sub signal in a delay section 21, a coefficient circuit 23 conducts the changeover of in-phase, interruption and opposite phase to provide a coefficient in the processing process of the sub signal, and a syntesizer 7 synthesizes signal being the result of processing of the main and sub signal. Furthermore, in an amplitude correcting section 22, a distributor 24 divides the input signal into the main and sub signal, an input changeover circuit 25 gives respectively the distributed sub signal to a terminator 26 at the ''interruption'' and to a processing circuit of the sub signal at ''inphase'' and ''opposite phase'' in synchronizing with the circuit 23, a changeover circuit 27 conducts the switching connection in synchronizing with the circuit 25, extracts the sub signal in the processing circuit only when the sub signal is connected to the processing circuit and synthesizes the extracted signal with the processed main signal at a synthesizer 17.
申请公布号 JPS59231932(A) 申请公布日期 1984.12.26
申请号 JP19830108179 申请日期 1983.06.14
申请人 MITSUBISHI DENKI KK 发明人 SAITOU KAZUO
分类号 H03H15/00;H04B3/06;H04B3/14;H04B7/005;(IPC1-7):H04B3/06 主分类号 H03H15/00
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