| 摘要 |
PURPOSE:To effectively reduce an interference noise caused by the coupling capacity between bit lines by inserting one of two pairs of bit lines between the other pair and crossing either one of the two bit line pairs at the center part of a memory cell array in a DRAM having a turnback bit line structure. CONSTITUTION:The DRAM is composed by arranging plural bit line pairs BL0 and the inverse of BL0, BL1 and the inverse of BL1,... and plural word lines WL0, WL2,... under a mutually crossed state and arranging memory cells M at the crossed positions of the bit line pairs and the word lines. The first bit line pair BL0 and the inverse of BL0 is made into a repeating pattern under an interposed shape between the second line pair BL1 and the inverse of BL1, the line pair BL0 and the inverse of BL0 is crossed at its longitudinal directional intermediate position once, and dynamic bit line sense amplifiers SA0, SA1,... are alternately arranged for both sides of the memory cell array and connected to the respective bit line pairs. Although the minimum limit means for realizing an electric effect is indicated here, the effect can be a further satisfactory one when the line pairs are further crossed in the neighborhoods of the amplifiers. |
