| 摘要 |
The display is characterized in that the input signal of a programmable logic controller and a stop signal are displayed in the internal relay, in that low input, overload, a temporary stop, roberts I and II CUP abnormal signals, and robert I and II original abnormal signals are displayed in the internal relay, in that an internal timer is connected to a buzzer, in that the internal timer is stored in a BCD channel data register, and in that the internal relay is connected to a latch signal, and the internal timer to the latch signal.
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