发明名称 VISIBILITY CALCULATING METHOD FOR THREE DIMENSIONAL SEMICONDUCTOR ETCHING PROCESS SIMULATION
摘要 PURPOSE: A visibility calculating method for three dimensional semiconductor etching process simulation is provided to efficiently decrease a time required in a simulation by decreasing the number of calculating repetition of a shadow test when an etching process simulation is performed. CONSTITUTION: Fragments(160,161) of a half sphere is moved on straight lines(140,141)which start from a point(130) on a semiconductor substrate and is performed by a shadow test. The shadow test is performed in points(100,101) in which straight lines(140,141) and an upper surface(180) of a mask are crossed and points(110,111) in which straight lines(140,141) and a lower surface(190) of the mask are crossed. A visibility is calculated by calculating as to whether points(100,101) are included in an inner portion of the upper surface(180) of the mask and points(110,111) are included in an inner portion of the lower surface(190) of the mask.
申请公布号 KR20000023861(A) 申请公布日期 2000.05.06
申请号 KR19980042649 申请日期 1998.10.13
申请人 KWON, O SEOB;WON, TAE YOUNG 发明人 KWON, O SEOB;WON, TAE YOUNG
分类号 H01L21/3065;(IPC1-7):H01L21/306 主分类号 H01L21/3065
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