发明名称 Non-volatile semiconductor memory capable of storing one-bit data or multi-bit data
摘要 Data latch circuits are provided corresponding to select memory cells from or into which read or program is executed. The data latch circuits are grouped by two into sets. When 2-bit data is read from or programmed into the select memory cells, one data latch circuit is selected by a select signal, and, when 1-bit data is read or programmed, the two data latch circuits in one set are selected by a select signal. Between one or two selected data latch circuits and a data input/output buffer, data is exchanged. By so doing, changeover between 2-level data and multi-level (4-level or more-level) data concerning program or read of data into or out the memory cells becomes possible.
申请公布号 US6331945(B1) 申请公布日期 2001.12.18
申请号 US20000528112 申请日期 2000.03.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIBATA NOBORU;TANAKA TOMOHARU;NAKAI HIROTO;YAMAMURA TOSHIO;FUJIMURA SUSUMU
分类号 G11C16/02;G11C11/56;G11C16/04;(IPC1-7):G11C16/06 主分类号 G11C16/02
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