发明名称 |
Low-delay buffering model in video coding |
摘要 |
Techniques for low-delay buffering in a video coding process are disclosed. Video decoding techniques may include receiving a first decoded picture buffer (DPB) output delay and a second DPB output delay for a decoded picture, determining, for the decoded picture, a first DPB output time using the first DPB output delay in the case a hypothetical reference decoder (HRD) setting for a video decoder indicates operation at a picture level, and determining, for the decoded picture, a second DPB output time using the second DPB output delay in the case that the HRD setting for the video decoder indicates operation at a sub-picture level. |
申请公布号 |
US9374585(B2) |
申请公布日期 |
2016.06.21 |
申请号 |
US201314036615 |
申请日期 |
2013.09.25 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Wang Ye-Kui |
分类号 |
H04N7/12;H04N19/115;H04N19/70;H04N19/146;H04N19/174;H04N19/42;H04N19/433;H04N19/172 |
主分类号 |
H04N7/12 |
代理机构 |
Shumaker & Sieffert, P.A. |
代理人 |
Shumaker & Sieffert, P.A. |
主权项 |
1. A method of decoding video, the method comprising:
receiving a first decoded picture buffer (DPB) output delay and a second DPB output delay; determining whether a hypothetical reference decoder (HRD) operates at an access unit level or operates at a sub-picture level; and based on a determination that the HRD operates at the access unit level, determining, by a video decoding device, for a decoded picture, a first DPB output time based on the first DPB output delay and a picture clock tick, or based on a determination that the HRD operates at the sub-picture level:
deriving a sub-picture clock tick based on the picture clock tick and a tick divisor value; anddetermining, by the video decoding device, for the decoded picture, a second DPB output time based on the second DPB output delay and the sub-picture clock tick. |
地址 |
San Diego CA US |