发明名称 Halbleiteranordnung
摘要 1308013 Semiconductor devices PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 5 May 1970 [8 May 1969] 21578/70 Heading H1K A method of manufacturing a semiconductor device in an integrated circuit using a two-stage epitaxial process comprises forming in one surface of a semiconductor substrate a region having a high concentration of an impurity of one conductivity type and depositing epitaxially on that surface a layer of the one conductivity type in two stages, the deposition process being interrupted between the first and second stages while the apparatus used for the epitaxial deposition is cleared of all traces of the impurity so that the second stage takes place in apparatus free from the impurity. Alternatively a different apparatus may be used for the second stage. The method is used in the formation of lateral transistors, wherein on a P-type substrate 1 P + type region 3 to form isolation regions and an N-type region 4 to form a buried layer are deposited. During the first stage of epitaxial growth N-type layer 5 is grown, the impurities from regions 3 and 4 diffusing up through this layer. The epitaxial growth is then stopped and the apparatus cleaned, and the surface of the epitaxial layer is etched. During the subsequent stage of epitaxial growth N-type layer 7 is grown free of the impurities from region 4. By diffusion into the free surface, emitter region 9 and collector region 10 are formed in this second stage layer 7, and P+ type impurity is diffused through to join with regions 3 so that they extend right through the epitaxial layers to form isolation regions. Arsenic and boron are used as the impurities.
申请公布号 CH513515(A) 申请公布日期 1971.09.30
申请号 CH19700006754 申请日期 1970.05.05
申请人 N. V. PHILIPS' GLOEILAMPENFABRIEKEN 发明人 ENCINAS,JUAN
分类号 C30B25/02;H01L21/00;H01L21/20;H01L21/203;H01L21/205;H01L21/22;H01L21/331;H01L21/74;H01L29/73;(IPC1-7):H01L7/34;H01L5/00 主分类号 C30B25/02
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