| 摘要 |
PURPOSE:To enable high speed test of memory IC, by writing in the data by the transfer address at the 2nd time to the cell group selected at the transfer address of the 1st time and comparing it with the expectation value transferred from external part through readout. CONSTITUTION:One of the storage cell groups designated with the address signal 102 transferred at first is selected out of the address decode signals outputted from the address decode circuit 3. The data 200-20n read out from the cell groups i0- in and the address signal 102 transferred at the 2nd time are supplied to the inspection circuit 6, and they are compared with the signal 102 being the expectation value, and the result is output as the readout data 101 from the data buffer circuit 5. At write-in operation, the address signal 102 transferred at the 2nd time is output to the write-in data 210-21n being the output of the write-in data buffer circuit 4, in response to the write-in data control signal 402 and the write-in operation is made to the cell groups i0-in. Thus, high speed test can be made through the test operation like this. |
