| 摘要 |
PURPOSE:To set a phase lock detection range and also to set an adaptive frequency range without any adjustment only by varying the setting of a delay time by solving problems of a conventional analog system by employing a digital system. CONSTITUTION:A frequency phase comparator 1 outputs signals D and U according to the phase relation between an input signal and the output of a VCO. Those outputs D and U are ORed and a signal 10 which is delayed by a time (t) is sampled by flip-flops 7 and 8 with the leading edge of the VCO output. When the phase difference between the input signal and VCO output is smaller than the delay time (t), the signal 10 is '0' at a sampling point of time, so signals 11 and 12 are both '0' and the output of an AND circuit 9 is '1', so that is detected as a phase lock state. When the phase difference is larger than the delay time (t), the input signal is sampled to obtain '0', but the output side of the VCO is sampled to detect '1' as the signal 10, which is not detected as the phase lock state. Namely, the range wherein the phase lock state is detected is determined only by the delay time (t).
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