摘要 |
<p>A serial bus interface comprises a shift register (12) for receiving and transmitting a serial data, a first selector (16) coupled to a serial input of the shift register for selectively coupling the input of the shift register to one of at least two serial data lines, and a second selector (26) coupled to a serial output of the shift register for selectively coupling the output of the shift register to one of the serial data lines. Further, a clock generator (14) capable of generating a clock pulse in at least two different formats is coupled to a clock line (32). This clock generator operates to output to the clock line a clock pulse in accordance with a format adopted in one of the serial data lines selected by the selector.</p> |